Digitronix Nepal

@digitronixnepal

Est. 2015·United States·English·~0.3 vids/wk

New on TrySpansa

Digitronix Nepal is a Tech YouTube creator with 2.9K subscribers and 611K total views. The channel covers fpga design, embedded systems, hardware design, vhdl tutorials, verilog programming. Active for 11 years, the channel publishes about 1 video per month. Videos average 3.8K views each. Based in United States, the channel's primary language is English. YouTube channels with 1K–10K sub channels typically charge between $50 and $500 per sponsored video. Book a sponsorship directly on TrySpansa.

2,880Subscribers

161Total Videos

610,943Total Views

Source: YouTube Data API

Views / Video284K

Impressions1.2M

Age Demographics

13-17

18-24

35%

25-34

28%

35-44

16%

45-54

55-64

65+

Gender Split

Male 62%Female 36%Other 2%

Core: Male 18-24

Top Countries

🇺🇸United States

28%

🇬🇧United Kingdom

18%

🇧🇷Brazil

12%

🇮🇳India

🇩🇪Germany

Traffic Sources

34%

Suggested

24%

External

14%

Browse

12%

Content Performance

128KAvg Views

4.2%CTR

+1.2KNet Subs

3:42Watch Time

Subscriber Growth

6 mo agoToday

Device Split

Desktop

48%

Mobile

34%

Tablet

11%

Watch Time

8:42Avg Duration

42%Retention

2.1MHours

6.8Views/Visit

Content Type

Long-form

55%

Shorts

28%

Live

12%

Members

Free · 10 seconds · No credit cardSee Digitronix Nepal’s audience data

Niches

Tech

About

FPGA + Electronic Hardware/Product Design Company Remember us for FPGA Design, Embedded Design, Machine Learning Acceleration on FPGA, Computer Vision System Development for Surveillance/Security Applications, and Crypto-algorithm development! Also visit, for AI/ML Acceleration on FPGAs in Edge and Cloud!

Recent Videos

PYNQ VDMA Overlay Design with VIVADO and Python Notebook

Vitis Beginner Tutorial- Creating GPIO project

Real time thermal profiling and alarming with Zynq FPGA

Lspci and Setpci commands for Bash Scripting for PCIe development with FPGA

Partial Reconfiguration with FPGA- Course Overview

Convolutional Neural Network (CNN) processor design on VHDL/Verilog

Yolo V3 Tiny [Caffe] for Object Detection with DPU DNNDK & Ultra96 FPGA

YoloV3 [Caffe] for Object Detection with DPU DNNDK and Ultra96 FPGA

Channel data updated June 2026

youtube.com/@digitronixnepal

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Channel VideosDigitronix Nepal

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04Subscribers

YouTube Data API: 2,880 subscribers

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Cost per 1,000 Views

Meta Ads (SaaS)$8.75

Mesha 2025

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Estimated Clicks

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02Conversion Rate (%)

Using Tech benchmark: 3.6% (Electronics & Appliances) · Skailama 2026

03Expected Purchases / Year

Using Tech benchmark: 1.6× /year · Beans 2021 freq × Bluecore/MobiLoud RPR

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Methodology & sourcesNot sourced from YouTube

● Free · No credit card required

Estimated pricing — negotiate directly

Topicsclassified by TrySpansa

fpga design embedded systems hardware design vhdl tutorials verilog programming xilinx vivado machine learning acceleration computer vision systems zynq development opencl programming hardware acceleration object detection algorithms fpga project tutorials

Resources

The Brief Isn't Dead. Unstructured Briefs Are. →NY Synthetic Performer Law: AI Clauses Your Deal Needs →Creator Payment Rails 2026: 5 Compared (Plus 1 Imposter) →

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See Digitronix Nepal’s insightsFree · 10 seconds · No credit card

Digitronix Nepal

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Topicsclassified by TrySpansa

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